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IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
.EATURES:
* * * * A and C grades Low input and output 1A (max.) CMOS power levels True TTL input and output compatibility: - VOH = 3.3V (typ.) - VOL = 0.3V (typ.) High Drive outputs (-15mA IOH, 48mA IOL) Meets or exceeds JEDEC standard 18 specifications Power off disable outputs permit "live insertion" Available in SOIC and QSOP packages
IDT74FCT161AT/CT
DESCRIPTION:
The IDT74FCT161T is a high-speed synchronous modulo-16 binary counter built using an advanced dual metal CMOS technology. It is synchronously presettable for application in programmable dividers and has two types of count enable inputs plus a terminal count output for versatility in forming synchronous multi-stage counters. The IDT74FCT161T has asynchronous Master Reset inputs that override all other inputs and force the outputs low.
* * * *
.UNCTIONAL BLOCK DIAGRAM
P0 PE P1 P2 P3
CEP CET
TC
CP
CP
CP
D CP CD Q
D Q Q0 DETAIL A DETAIL A DETAIL A
30
DETAIL A MR Q0 Q1 Q2 Q3
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
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(c) 2002 Integrated Device Technology, Inc.
MARCH 2002
DSC-5504/2
IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
INDUSTRIAL TEMPERATURE RANGE
PIN CON.IGURATION
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM(2) VTERM(3) TSTG IOUT Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max -0.5 to +7 -0.5 to VCC+0.5 -65 to +150 -60 to +120 Unit V V C mA
MR CP P0 P1 P2 P3 CEP GND
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VCC TC Q0 Q1 Q2 Q3 CET PE
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 2. Inputs and Vcc terminals only. 3. Output and I/O terminals only.
CAPACITANCE (TA = +25C, F = 1.0MHz)
Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. 10 12 Unit pF pF
NOTE: 1. This parameter is measured at characterization but not tested.
SOIC/ QSOP TOP VIEW
PIN DESCRIPTION
Pin Names CEP CET CP MR P0-3 PE Q0-3 TC Description Count Enable Parallel Input Count Enable Trickle Input Clock Pulse Input (Active Rising Edge) Asynchronous Master Reset Input (Active LOW) Parallel Data Inputs Parallel Enable Input (Active LOW) Flip-Flop Outputs Terminal Count Output
.UNCTION TABLE(1)
PE X L H H H CET X X H L X CEP X X H X L Action on the Rising Clock Edge(s) Reset (Clear) Load (PxQx) Count (Increment) No Change (Hold) No Change (Hold)
NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care
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IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40C to +85C, VCC = 5.0V 5%
Symbol VIH VIL IIH IIL II VIK IOS VOH VOL VH ICC Parameter Input HIGH Level Input LOW Level Input HIGH Current Input LOW Current
(4) (4) (4)
Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max., VI = VCC (Max.) VCC = Min., IN = -18mA VCC = Max. , VO = GND VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL -- VCC = Max. VIN = GND or VCC IOH = -8mA IOH = -15mA IOL= 48mA
(3) (5)
Min. 2V --
Typ.(2) -- -- -- -- -- -0.7 -120 3.3 3 0.3 200 0.01
Max. -- 0.8 1 1 1 -1.2 -225 -- -- 0.5 -- 1
Unit V V A A A V mA V V mV mA
VI = 2.7V VI = 0.5V
-- -- -- -- -60 2.4 2 -- -- --
Input HIGH Current
Clamp Diode Voltage Short Circuit Current Output HIGH Voltage Output LOW Voltage Input Hysteresis Quiescent Power Supply Current
NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. The test limit for this parameter is 5A at TA = -55C. 5. Clock pin requires a minimum VIH of 2.5V.
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IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current (4) Test Conditions(1) VCC = Max. VIN = 3.4V(3) VCC = Max., Outputs Open Load Mode CEP = CET = PE = GND MR = VCC One Input Toggling 50% Duty Cycle VCC = Max., Outputs Open Load Mode fCP = 10MHz 50% Duty Cycle CEP = CET = PE = GND MR = VCC One Bit Toggling at fi = 5MHz 50% Duty Cycle VCC = Max., Outputs Open Load Mode fCP = 10MHz 50% Duty Cycle CEP = CET = PE = GND MR = VCC Four Bits Toggling at fi = 5MHz 50% Duty Cycle VIN = VCC VIN = GND Min. -- -- Typ.(2) 0.5 0.15 Max. 2 0.25 Unit mA mA/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND
--
1.5
3.5
mA
VIN = 3.4V VIN = GND
--
2
5.5
VIN = VCC VIN = GND
--
3.8
7.3(5)
VIN = 3.4V VIN = GND
--
5
12.3(5)
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz.
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IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT74FCT161AT Symbol tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPHL tPHL tSU tH tSU tH tSU tH tW tW tPHL tPHL Parameter Propagation Delay CP to Qx (PE Input HIGH) Propagation Delay CP to Qx (PE Input LOW) Propagation Delay CP to TC Propagation Delay CET to TC Propagation Delay MR to Qx Propagation Delay MR to TC Set-up Time, HIGH or LOW, Px to CP Hold Time, HIGH or LOW, Px to CP Set-up Time, HIGH or LOW, PE or SR to CP Hold Time, HIGH or LOW, PE or SR to CP Set-up Time, HIGH or LOW, CEP or CET to CP Hold Time, HIGH or LOW, CEP or CET to CP Clock Pulse, Width (Load) HIGH or LOW Clock Pulse, Width (Count) HIGH or LOW MR Pulse Width LOW Recovery Time MR to CP Condition
(1)
IDT74FCT161CT Min. 2 2 2 1.5 2 2 4 1.5 9.5 1.5 9.5 0 4(3) 6 4 5
(3)
(2)
Min. 2 2 2
(2)
Max. 7.2 6.2 9.8 5.5 8.5 7.5 -- -- -- -- -- -- -- -- -- --
Max. 5.8 5.8 7.4 5.2 6 7 -- -- -- -- -- -- -- -- -- --
Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
CL = 50pF RL = 500
1.5 2 2 4 1.5 9.5 1.5 9.5 0 4(3) 6 4 5
(3)
NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This limit is guaranteed but not tested.
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IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVE.ORMS
V CC 500 VIN Pulse Generator RT D.U.T . VOUT 7.0V
SWITCH POSITION
Test Open Drain Disable Low Enable Low All Other Tests Switch Closed Open
50pF CL
500
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal link
Test Circuits for All Outputs
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC.
tSU
tH
tREM
3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V
Octal link
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
Octal link
1.5V
1.5V
tSU
tH
Pulse Width
Set-Up, Hold, and Release Times
ENABLE SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V
Octal link
DISABLE 3V 1.5V
CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED tPZH SWITCH OPEN 1.5V 0V 3.5V 1.5V tPHZ 0.3V tPLZ
0V 3.5V 0.3V VOL VOH 0V
Octal link
Propagation Delay
Enable and Disable Times
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.
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IDT74FCT161AT/CT FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTER
INDUSTRIAL TEMPERATURE RANGE
ORDERING IN.ORMATION
IDT X FCT XXXX Device Type X Package
Temperature Range
SO Q
Small Outline IC Quarter-size Small Outline Package
161AT 161CT
Synchronous Presettable Binary Counter
74
- 40 to +85C
DATA SHEET DOCUMENT HISTORY
3/25/2002 Removed standard speed grade
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